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t = ln ? ? ? R TOTAL C SAMPLE
C8051F380/1/2/3/4/5/6/7/C
6.3.3. Settling Time Requirements
A minimum tracking time is required before each conversion to ensure that an accurate conversion is per-
formed. This tracking time is determined by the AMUX0 resistance, the ADC0 sampling capacitance, any
external source resistance, and the accuracy required for the conversion. Note that in low-power tracking
mode, three SAR clocks are used for tracking at the start of every conversion. For most applications, these
three SAR clocks will meet the minimum tracking time requirements.
Figure 6.5 shows the equivalent ADC0 input circuit. The required ADC0 settling time for a given settling
accuracy (SA) may be approximated by Equation 6.1. See Table 5.10 for ADC0 minimum settling time
requirements as well as the mux impedance and sampling capacitor values.
? 2n ?
--------
? SA ?
Equation 6.1. ADC0 Settling Time Requirements
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R TOTAL is the sum of the AMUX0 resistance and any external source resistance.
n is the ADC resolution in bits (10).
Px.x
Differential Mode
MUX
Select
R MUX
RC Input = R MUX * C SAMPLE
C SAMPLE
Px.x
Single-Ended Mode
MUX Select
R MUX
C SAMPLE
RC Input = R MUX * C SAMPLE
C SAMPLE
Px.x
R MUX
MUX Select
Figure 6.5. ADC0 Equivalent Input Circuits
52
Rev. 1.4
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